1. Field of the Invention
This invention relates to a multiplexed delta-sigma modulator. Specifically, this invention relates to the addition of downsamplers to a multiplexed, delta-sigma modulator, analog-to-digital converter, wherein the downsamplers operate at specified sampling rates.
2. Description of the Related Art
The general structure of an oversampled, delta-sigma modulator analog-to-digital converter (A/D) is shown in FIG. 1. In FIG. 1, an analog input signal 10-1 is applied to a delta-sigma modulator 20-1, where the analog input signal 10-1 is sampled at a frequency f.sub.s. Note that the term "delta-sigma modulator" is sometimes also referred to as "sigma-delta modulator", with the transposition of the terms sigma and delta being a matter of a particular author's preference. A/D converters using delta-sigma modulators typically have a modulator section that oversamples an input analog signal and consequently digitizes that signal, and a digital filtering section that removes modulation noise from the digital data stream output from the modulator section.
The output of the delta-sigma modulator 20-1 is coupled to an input of a decimator 30-1. A digital stream 40-1 is output from the delta-sigma modulator 20-1 at a rate f.sub.s and received by the decimator 30-1. The decimator 30-1 outputs an n-bit digital stream 45-1 at a rate, f.sub.n, corresponding to the Nyquist rate of the analog input signal 10-1; that is, f.sub.n corresponds to approximately twice the highest frequency component of the analog input signal 10-1. Typically, f.sub.s is much greater than f.sub.n, and thereby the delta-sigma modulator 20-1 performs oversampling on the analog input signal 10-1. An oversampling ratio is defined as f.sub.s /f.sub.n. The oversampling of the analog input signal 10-1 by the delta-sigma modulator 20-1 is a necessary feature of the oversampled A/D.
FIG. 2 shows another conventional, first-order, oversampling delta-sigma modulator A/D. In FIG. 2, an analog input signal 10-2 is first applied to an anti-aliasing filter 20-2, which may correspond to a simple first-order analog filter, such as a Resistor/Capacitor (RC) filter. The anti-aliasing filter 20-2 removes any aliasing frequencies from the analog input signal 10-2 due to sampling of the analog input signal 10-2 and the like, and outputs a filtered signal 30-2. The filtered signal 30-2 is then applied to a first input port of the delta-sigma modulator 40-2, which corresponds to an addition input port of an adder/subtracter 50-2. The adder 50-2 subtracts a feedback signal 60-2 from the filtered signal 30-2, and the result of this arithmetic operation, in which the feedback signal 60-2 is subtracted from the filtered signal 30-2, is an error signal 70-2.
The error signal 70-2 is applied to an analog, first-order, low pass filter 80-2. The low pass filter 80-2 removes high frequency components from the error signal 70-2 and outputs a filtered error signal 90-2. The low pass filter 80-2 primarily acts as an integrating device. Since the low pass filter 80-2 is a first-order filter, the delta-sigma modulator 40-2 as shown in FIG. 2 is a first-order delta-sigma modulator.
The transfer function of a first-order, low pass filter can be expressed as: H(s)=1/s, and the transfer function of a second-order low pass filter can be expressed as: EQU H(s)=[g(s+c)/(s+a)(s+b)].
Inaccuracies in the conversion process of the input analog function into a digital signal (such inaccuracy is also known as modulator noise) are reduced by the delta-sigma modulator 40-2 as a result of the delta-sigma modulator keeping track of all previous conversion errors and feeding this information back, for example, as the feedback signal 60-2, in order to apply the proper amount of correction for the next conversion cycle.
In this process, the first-order delta-sigma modulator 40-2 attempts to zero out the average error over a period of time. A second-order delta-sigma modulator (i.e., a delta-sigma modulator in which low pass filter 80-2 is a second order filter) not only keeps the average error at a zero value, but also keeps the first derivative of the error signal 70-2 at a zero value.
In a first-order system, only a DC input signal can be accurately converted to digital form. However, in a second order system, both DC and AC signals can be accurately converted to digital form, but at the expense of an increased bandwidth of the digital signal.
Referring again to FIG. 2, the filtered error signal 90-2 is then applied to an r-bit quantizer 100-2, which samples the filtered error signal 90-2 at a rate f.sub.s. The output signal 110-2 of the quantizer 100-2 corresponds to the output signal of the delta-sigma modulator 40-2. This output signal 110-2 is supplied to an input of a low-pass decimation filter 120-2. The output signal 110-2 of the quantizer 100-2 is also fed back through a digital-to-analog converter (D/A) 130-2 to be converted to an analog feedback signal 60-2. The analog feedback signal 60-2 is input to a subtraction input port of the adder/subtracter 50-2, in order to create the updated error signal 70-2.
The feedback loop contained within the delta-sigma modulator 40-2 is necessary to cause the error signal 70-2 to be as close to zero as possible, so that the output signal 110-2 of the delta-sigma modulator 40-2 is maintained as close to the digital equivalent of the analog input signal 10-2 as possible.
The low-pass decimation filter 120-2 receives the output signal 110-2 at a rate f, and outputs an n-bit digital signal 140-2. The n-bit digital signal 140-2 is then down-sampled by a down-sampler 150-2 at a rate f.sub.n corresponding to the Nyquist rate of the analog input signal 10-2. An n-bit output digital signal 160-2 corresponding to the "digitized" version of the analog input signal 10-2 is recovered at the output of the down-sampler 150-2.
FIG. 3 shows still another conventional, over-sampled delta-sigma modulator A/D. Delta-sigma modulator 40-3 corresponds to a series combination of an adder/subtracter 50-3, a first-order, low pass analog filter 80-3, a quantizer 100-3 outputting a digital data stream 110-3, a digital integrator 55-3 and a digital-to-analog converter 130-3. The output 60-3 of the digital-to-analog converter 130-3 is fed to a subtraction input of the adder/subtracter 50-3. A decimation filter 120-3 is connected to the output of delta-sigma modulator 40-3, and a down-sampler 150-3 is connected to the output of the decimation filter 120-3.
By utilizing an A/D having a delta-sigma modulator, one can achieve processing at very high precision by the use of the oversampling process of the delta-sigma modulator. By oversampling the input analog signals, the quantization noise and other high frequency noise associated with the analog-to-digital conversion are suppressed because of the use of a high sampling rate with respect to the Nyquist rate of the input signal. Such applications of A/Ds have utility in the telecommunications field, the voice synthesis field, and other fields that require high resolution digital processing of analog signals.
However, in all of these above-described A/Ds using delta-sigma modulators, only one analog signal at a time can be digitized by the delta-sigma modulator. Since the delta-sigma modulator contains relatively large and expensive analog hardware, this limitation of conventional approaches results in the need to have one delta-sigma modulator for every analog signal that needs to be simultaneously digitized, thereby increasing the size and cost of integrated circuits having such components.
U.S. Pat. No. 5,345,236, invented by J. Sramek, discloses a delta-sigma modulator A/D having an input multiplexer and an output demultiplexer. However, in the A/D as disclosed by Smarek, the output of the delta-sigma modulator provides a one-bit digital data stream that is then output to a digital filter. The digital filter feeds a demultiplexer, which in turn feeds a bank of data channel registers, where the data is accumulated and averaged to remove AC line noise on a per channel basis.